A bipolar junction transistor (BJT) consists of three differently doped semiconductor regions, namely the emitter region, the base region, and the collector region. A bipolar junction transistor includes a pair of P-N junctions, namely an emitter-base junction and a collector-base junction. An NPN-type bipolar junction transistor has a thin region of p-type semiconductor material constituting the base region between two regions of n-type semiconductor material constituting the emitter and collector regions. A PNP-type bipolar junction transistor has a thin region of n-type semiconductor material constituting the base region between two regions of p-type semiconductor material constituting the emitter and collector regions.
A voltage applied across the emitter-base junction controls the movement of charge carriers that produces current flow between the collector and emitter regions of a bipolar junction transistor. Because the collector region surrounds the emitter region, almost all of the charge carriers injected into the base region are collected. As a result, a small current entering the base region of a NPN transistor, or flowing from the base region in the case of a PNP transistor, is highly amplified in the collector output. Because electron mobility is higher than hole mobility in silicon, NPN-type bipolar junction transistors offer greater currents and faster operation under most circumstances than PNP-type bipolar junction transistors. As a consequence, NPN-type bipolar junction transistors are the prevalent type of bipolar junction transistor currently used in contemporary integrated circuits.
A key metric indicative of the efficiency of a bipolar junction transistor is the proportion of charge carriers able to cross the base region and reach the collector region without recombination. The ratio of the collector current to the base current, which is known as the current gain or beta (β), is typically greater than about 100. An increase in carrier mobility is effective to enhance the current gain of a bipolar junction transistor.
Carrier mobility in a field effect transistor fabricated by a complementary metal oxide semiconductor process can be modified by applying mechanical stress to the channel region. One approach is to strain the crystal lattice of the channel region with a stress-imparting conformal, capping layer composed of an insulating material, such as a compressively-stressed or tensilely-stressed capping layer of silicon nitride. The silicon nitride capping layer induces compressive or tensile stress in the channel region. Another approach is to introduce so-called stressors directly into the device structure that are capable of straining the crystal lattice of the channel region. For example, embedded silicon-germanium stressors may be formed beneath the source and drain regions of a field effect transistor so as to deliver compressive or tensile strain to the intervening channel region.
There is a need for continued improvement in stress-modified device structures and related fabrication methods that are capable of improving device performance in semiconductor devices, like bipolar junction transistors, without the use of a stress-imparting layer of an insulating material and without physical modifications to the construction of the semiconductor device itself, as well as a need for related design structures for integrated circuits.